View TDA7491HV_4115590.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TDA7491HV
20 W + 20 W dual BTL class-D audio amplifier
Features
! ! ! ! ! ! ! ! ! ! !
20 W + 20 W continuous output power: RL = 8 , THD = 10% at VCC = 18 V Wide range single supply operation (5 V - 19 V) High efficiency ( = 90%) Four selectable, fixed gain settings of 20 dB, 26 dB, 30 dB and 32 dB Differential inputs minimize common-mode noise Filterless operation No `pop' at turn-on/off Standby and mute features Short circuit protection Thermal overload protection Externally synchronizable PowerSSO-36 with exposed pad (or slug) down
Description
The TDA7491HV is a dual BTL class-D audio amplifier with single power supply designed for LCD TVs and monitors. Thanks to the high efficiency and slug-down package no heatsink is required. Furthermore, the filterless operation allows a reduction in the external component count. The TDA7491HV is pin to pin compatible with the TDA7491P and TDA7491LP.
Table 1.
Device summary
Operating Temp. range 0 to 70 C 0 to 70 C Package PowerSSO-36 (slug down) PowerSSO-36 (slug down) Tube Tape and reel Packing
Order code TDA7491HV TDA7491HV13TR
December 2007
Rev 1
1/26
www.st.com 26
Contents
TDA7491HV
Contents
1 2 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 2.2 Pin-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 3.2 3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Characterization curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 4.2 4.3 For 8 loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 For 6 loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 For 4 loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 6 7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.1 7.2 7.3 7.4 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.4.1 7.4.2 Master mode (internal clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Slave mode (external clock) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.5 7.6 7.7 7.8 7.9
Filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/26
TDA7491HV
Contents
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3/26
Device block diagram
TDA7491HV
1
Device block diagram
Figure 1 shows the block diagram of one of the two identical channels of the TDA7491HV. Figure 1. Internal block diagram (one channel only)
4/26
TDA7491HV
Pin description
2
2.1
Pin description
Pin-out
Figure 2. Pin connection (top view)
5/26
Pin description
TDA7491HV
2.2
Pin list
Table 2.
Number 1 2,3 4,5 6,7 8,9 10,11 12,13 14,15 16,17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
Pin description list
Name SUB_GND OUTPUTB PGNDB PVCCB OUTNB OUTNA PVCCA PGNDA OUTPA PGND VDDPW STBY MUTE INPA INNA ROSC SYNCLCK VDDS SGND DIAG SVR GAIN0 GAIN1 INPB INNB VREF SVCC VSS Type POWER OUT POWER POWER OUT OUT POWER POWER OUT POWER OUT INPUT INPUT INPUT INPUT OUT IN/OUT OUT POWER OUT OUT INPUT INPUT INPUT INPUT OUT POWER OUT Connect to the frame Positive PWM for right channel Power stage round for right channel Power supply for right channel Negative PWM output for right channel Negative PWM output for right channel Power supply for left channel Power stage round for left channel Positive PWM output for left channel Power stage round 3.3 V (nominal) regulator output referred to ground for power stage Standby mode control Mute mode control Positive differential input of left channel Negative differential input of left channel Master oscillator frequency-setting pin Clock in/out for external oscillator 3.3 V (nominal) regulator output referred to ground for signal blocks Signal round Open-drain diagnostic output Supply voltage rejection Gain setting input 1 Gain setting input 2 Positive differential input of right channel Negative differential input of right channel Half VDDS (nominal) referred to ground Signal power supply 3.3 V (nominal) regulator output referred to power supply Description
6/26
TDA7491HV
Electrical specifications
3
3.1
Electrical specifications
Absolute maximum ratings
Table 3.
Symbol VCC Top Tj Tstg
Absolute maximum ratings
Parameter DC supply voltage for pins PVCCA, PVCCB, SVCC Operating temperature Junction temperature Storage temperature Value 23 0 to 70 -40 to 150 -40 to 150 Unit V C C C
3.2
Thermal data
Table 4.
Symbol Rth j-case Rth j-amb
Thermal data
Parameter Thermal resistance, junction to case Thermal resistance, junction to ambient (mounted on recommended PCB)(1) Min Typ 2 24 Max 3 C/W Unit
1. FR4 with vias to copper area of 9 cm2 (see also Section 7.9: Heatsink requirements on page 24).
3.3
Electrical specifications
Unless otherwise stated, the results in Table 5 below are given for the conditions: VCC = 18 V, RL (load) = 8 , ROSC = 39 k, C1 = 100 nF, f = 1 kHz, GV = 20 dB, and Tamb = 25 C. Table 5.
Symbol VCC Iq IqSTBY VOS VOS IOC Tj Ri VOV
Electrical specifications
Parameter Supply voltage for pins PVCCA, PVCCB, SVCC Total quiescent Quiescent current in standby Output offset voltage Output offset voltage Play mode Mute mode -200 -300 3 5 150 Differential input 55 19 60 21 Condition Min 5 26 2.5 Typ Max 18 35 5.0 200 300 Unit V mA A mV mV A C k
Over current protection threshold RL = 0 Junction temperature at thermal shut-down Input resistance Over voltage protection threshold
7/26
Electrical specifications Table 5.
Symbol RdsON
TDA7491HV
Electrical specifications (continued)
Parameter Power transistor on resistance Low side THD = 10% Output power THD = 1% RL = 8 , THD = 10% VCC = 12 V 16 9.5 W 7.2 4.0 80 90 0.1 18 24 28 30 -1 f = 1 kHz A Curve, GV = 20 dB f = 22 Hz to 22 kHz 50 20 V 25 40 50 50 Internal oscillator With internal oscillator
(1)
Condition High side
Min
Typ 0.2 0.2 20
Max
Unit
Po
W
Po
Output power
RL = 8 , THD = 1% VCC = 12 V Po = 20 W + 20 W, THD = 10% Po = 20 W + 20 W Po = 1 W GAIN0 = L, GAIN1 = L GAIN0 = L, GAIN1 = H
PD THD
Dissipated power Efficiency Total harmonic distortion
W % 0.4 22 28 dB 32 34 1 dB dB %
20 26 30 32
GV
Closed loop gain GAIN0 = H, GAIN1 = L GAIN0 = H, GAIN1 = H
GV CT eN
Gain matching Cross talk Total input noise
35 dB ns 330 kHz kHz
SVRR Tr, Tf FSW FSWR VinH VinL
Supply voltage rejection ratio Rise and fall times Switching frequency Output switching frequency Digital input high (H) Digital input low (L)
Fr = 100 Hz, Vr = 0.5 V, CSVR = 10 F
290 250
310
With external oscillator (2) 250 2.3
V 0.8 STBY < 0.5 V, MUTE = X Standby
Function Standby, mute and play modes mode AMUTE Mute attenuation
STBY > 2.5 V, MUTE < 1 V Mute STBY > 2.5 V, MUTE > 2 V Play VMute = 1 V 60 80 dB
1. FSW = 106 / (64 * ROSC + 440) kHz, fSYNCLK = 2 * FSW with R1 in k (see Figure 22). 2. FSW = fSYNCLK / 2 with the frequency of the external oscillator.
8/26
TDA7491HV
Characterization curves
4
4.1
Characterization curves
For 8 loads
Figure 3. Output power vs supply voltage
26 24 22 20 18 16 14 12 10 8 6 4 2 0 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Output Power (W)
Supply Voltage (V)
Figure 4.
THD + N vs output power
THD+N (%)
10 5
Vs=18V Rl=8 f=1kHz
2 1
0.5
0.2 0.1 0.05
L CH
R CH
0.02
0.01 100m
200m
500m
1
2
5
10
20
Po (W)
9/26
Characterization curves Figure 5. THD + N vs output power (without LC filter)
10 5
TDA7491HV
Vs=18V Rl=8 f=1kHz
2 1 0.5
L CH
0.2 0.1 0.05
R CH
0.02 0.01 100m
200m
500m
1
2
5
10
20
30
Po (W)
Figure 6.
THD + N vs frequency
THD +N (%)
10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 20 50 100
Vs = 18V Rl = 8 ohm
Pout =100mW
Pout =1 W
200 500 1k 2k 5k 10k 20k
Frequency (Hz)
Figure 7.
Closed-loop gain vs frequency
Ampl (dB)
+2 +1.5 +1 +0.5 -0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 -5 20 50 100 200 500 1k 2k 5k 10k 20k 50k
Gain =32 dB
Gain =30 dB
Gain =26 dB Vs = 18V Rl = 8 ohm @ f =1kHz, Po =1W
Gain =20 dB
Frequency (Hz)
10/26
TDA7491HV Figure 8. Cross talk vs frequency
Cross Talk (dB)
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 50 100 200 500 1k 2k 5k
Characterization curves
Vs =18V Rl =8 ohm 0dB @ f =1kHz Po =1W Lo to R
Ro to L
10k
20k
Frequency (Hz)
Figure 9.
Power dissipation and efficiency vs output power (per channel)
Pout Per Channel (W) 100 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 8 9 1011 121314 15161718 1920 Pout Per Channel (W) 8 7 6 5 4 3 2 1 0 Power Dissipation (W)
Figure 10. Attenuation vs mute voltage
10.00 0.00 -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 0.00
Attenuation (dB)
Efficiency (%)
Vs =18V Rl =8 ohm 0 dB @ f =1kHz Po =1W
0.50 1.00 1.50 2.00 2.50 Mute Voltage (V)
3.00
3.50
11/26
Characterization curves Figure 11. Total quiescent current vs supply voltage
50 45 40 Iq (mA) 35 30 25 20 15 10 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Supply Voltage (V)
No Load No Load Play Mode Play Mode
TDA7491HV
Figure 12. Power supply rejection ratio vs frequency
SVR-Supply Ripple Rejection Ratio (dB)
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20 50 100 200 500 1k 2k 5k 10k 20k
Vs =18V, Rl =8 ohm Gain =20 dB 0 dB @ Ripple Frequency =100Hz Ripple Voltage = 500mV
L-Channel
R-Channel
Frequency (Hz)
4.2
For 6 loads
Figure 13. Output power vs supply voltage
28 24 Output Power (W) 20 16 12 8 4 0 5 7 9 11 13 15 17 19 Supply Voltage (V)
12/26
TDA7491HV Figure 14. THD vs output power
THD (%)
10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10
Characterization curves
Vs = 18V Rl = 6 ohm f =1kHz
20
30
Output Power (W)
Figure 15. Frequency response
Ampl (dB)
+2 +1.5 +1 +0.5 -0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 -5 20 50 100 200 500 1k 2k 5k 10k 20k 50k
Vs = 18V Rl = 6 ohm f =1kHz Po =1W
Frequency (Hz)
Figure 16. THD vs frequency
THD (%)
10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Vs = 18V Rl = 6 ohm f =1kHz Po =1W
Frequency (Hz)
13/26
Characterization curves Figure 17. Cross talk vs frequency
Cross Talk (dB)
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100
TDA7491HV
Vs =18V Rl =6 ohm f =1kHz Po =1W Lo to R
Ro to L
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 18. FFT performance (0 dB)
FFT (dB)
+10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k 2k 5k 10k 20k
Vs =18V Rl =6 ohm f =1kHz Po =1W
Frequency (Hz)
Figure 19. FFT performance (60 dB)
FFT (dB)
+10 +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k 2k 5k 10k 20k
Vs =18V Rl =6 ohm @ f =1kHz Po =1W
Frequency (Hz)
14/26
TDA7491HV
Characterization curves
4.3
For 4 loads
Figure 20. Output power vs supply voltage p
22 20 18 16 14 12 10 8 6 4 2 0 5 6 7 8 9 10 11 12 13 14 Supply Voltage (V) pp y g( )
Output Power (W)
15/26
Package information
TDA7491HV
5
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: http://www.st.com. Figure 21. PowerSSO-36 package dimensions
DM . I A A2 a1 b c D (1) E (1) e e3 F G G1 H h k L M N O Q S T U X Y M N. I 2.15 2. 5 1 0 0.18 0.23 10.10 7. 4 0.5 8 .5 2.3 0.1 0 0.6 0 1 0 0 0.39 8 .5 0.4 0 u 0.55 4.3 10u 1.2 0.8 2.9 .65 1.0 4.1 6.5 4. 7 7. 3 0.161 0.256 0. 4 07 0. 3 01 0. 1 14 0.144 0. 3 09 0. 8 15 0. 8 27 0.9 0 0.02 2 0. 6 19 10 u 5u 0.035 mm TYP. M A . X 2.4 7 2.4 0 0.0 7 5 0.3 6 0.3 2 10 . 0 5 7.6 MIN . 0.08 4 0.084 0 0.00 7 0.00 9 0. 9 38 0. 9 21 0. 1 09 0.335 0. 9 00 0.00 4 0. 0 02 0.413 0.01 6 in c h TY P. MAX. 0.097 0.09 4 0.00 3 0.014 0.012 0.413 0.299
Outline and mechanical data
10.1 0
P o er Pow werSSO-36
exposed pad (or slug) down
(1) "D" a n d d on o in c d m ld flash o rp r r u s n s o ld s "E" t lu e o o t io M fla h o r po tr sio n s a ll n oet x e d 0 . m m pid e 0 0 0 6 ru sh ce 15 e r s . ") (
A2
A
G
L E A D C O P L A N A R IT Y
D
A
e T
a1
s ta n d -o ff
Y M
G a u g e p la n e 0 .2 5
h x 4u 5
L
O
E H X
F
U
B
0 .1 M A B
b e3
S
B O T T O M V IE W
7587 1 3 A 1
16/26
k
c
Q
TDA7491HV
Application circuit
6
Application circuit
Figure 22. Application circuit TDA7491HV
Input settings for gain: GAIN0 : GAIN1 0V:0V 0 V : 3.3 V 3.3 V : 0 V 3.3 V : 3.3 V Nominal gain 20 dB 26 dB 30 dB 32 dB
Input settings for standby, mute and play: STBY : MUTE 0V:0V 0 V : 3.3 V 3.3 V : 0 V 3.3 V : 3.3 V Mode Standby Standby Mute Play
17/26
Application information
TDA7491HV
7
7.1
Application information
Mode selection
The three operating modes of the TDA7491HV are set by the two inputs STBY (pin 20) and MUTE (pin 21).
" " "
Standby mode: all circuits are turned off, very low current consumption. Mute mode: inputs are connected to ground and the positive and negative PWM outputs are at 50% duty cycle. Play mode: the amplifiers are active.
The protection functions of the TDA7491HV are realized by pulling down the voltages of the STBY and MUTE inputs shown in Figure 23. The input current of the corresponding pins must be limited to 200 A. Table 6. Mode settings
STBY L (1) H H
(1)
Mode Selection Standby Mute Play
MUTE X (don't care) L H
1. Drive levels defined in Table 5: Electrical specifications on page 7.
Figure 23. STBY and MUTE circuit
TDA7491HV
Figure 24. Turn on/off sequence for minimizing speaker "pop"
18/26
TDA7491HV
Application information
7.2
Gain setting
The gain of the TDA7491HV is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31). Internally, the gain is set by changing the feedback resistors of the amplifier. Table 7. Gain settings
GAIN0 0 0 1 1 GAIN1 0 1 0 1 Nominal gain, Gv (dB) 20 26 30 32
7.3
Input resistance and capacitance
The input impedance is set by an internal resistor Ri = 60 k (typical). An input capacitor (Ci) is required to couple the AC input signal. The equivalent circuit and frequency response of the input components are shown in Figure 25. For Ci = 220 nF the high-pass filter cut-off frequency is below 20 Hz: fc = 1 / (2 * * Ri * Ci) Figure 25. Device input circuit and frequency response
19/26
Application information
TDA7491HV
7.4
Internal and external clocks
The clock of the class-D amplifier can be generated internally or can be driven by an external source. If two or more class-D amplifiers are used in the same system, it is recommended that all devices operate at the same clock frequency. This can be implemented by using one TDA7491HV as master clock, while the other devices are in slave mode (that is, externally clocked. The clock interconnect is via pin SYNCLK of each device. As explained below, SYNCLK is an output in master mode and an input in slave mode.
7.4.1
Master mode (internal clock)
Using the internal oscillator, the output switching frequency, FSW, is controlled by the resistor, ROSC, connected to pin ROSC: FSW = 106 / (64 * ROSC + 440) kHz where ROSC is in k. In master mode, pin SYNCLK is used as a clock output pin, whose frequency is: FSYNCLK = 2 * FSW For master mode to operate correctly then resistor ROSC must be less than 60 k as given below in Table 8.
7.4.2
Slave mode (external clock)
In order to accept an external clock input the pin ROSC must be left open, that is, floating. This forces pin SYNCLK to be internally configured as an input as given in Table 8. The output switching frequency of the slave devices is: FSW = FSYNCLK / 2 Table 8. How to set up SYNCLK
Mode Master Slave ROSC ROSC < 60 k Floating (not connected) OUTPUT INPUT SYNCLK
Figure 26. Master and Slave Connection
TDA7491HV
TDA7491HV
20/26
TDA7491HV
Application information
7.5
Filterless modulation
The output modulation scheme of the BTL is called unipolar pulse width modulation (PWM). The differential output voltages change between zero and +Vcc and between zero and -Vcc. This is in contrast to the traditional bipolar PWM outputs which change between +Vcc and -Vcc. An advantage of this scheme is that it effectively doubles the switching frequency of the differential output waveform. The OUTP and OUTN are in the same phase when the input is zero, then the switching current is low and the loss in the load is small. In practice, a short delay is introduced between these two outputs in order to avoid the BTL output switching at the same time. TDA7491HV can be used without a filter before the speaker, because the frequency of the TDA7491HV output is beyond the audio frequency, the audio signal can be recovered by the inherent inductance of the speaker and natural filter of the human ear. Figure 27. Unipolar PWM output
21/26
Application information
TDA7491HV
7.6
Output low-pass filter
To avoid EMI problems, it may be necessary to use a low-pass filter before the speaker. The cutoff frequency should be larger than 22 kHz and much lower than the output switching frequency. It is necessary to choose the L-C component values depending on the loud speaker impedance. Some typical values, which give a cut-off frequency of 27 kHz, are shown in Figure 28 and Figure 29 below. Figure 28. Typical LC filter for a 8- speaker
Figure 29. Typical LC filter for a 4- speaker
22/26
TDA7491HV
Application information
7.7
Protection function
The TDA7491HV is fully protected against over-voltages, under-voltages, over- currents and thermal overloads as explained here. See also Table 5: Electrical specifications on page 7.
Over-voltage protection (OVP)
If the supply voltage exceeds 20 V (nominal) the over-voltage protection is activated which forces the outputs to the high-impedance state. When the supply voltage drops to below the threshold value the device restarts.
Under-voltage protection (UVP)
If the supply voltage drops below 4 V (nominal) the under-voltage protection is activated which forces the outputs to the high-impedance state. When the supply voltage recovers the device restarts.
Over-current protection (OCP)
If the output current exceeds 4 A (nominal) the over-current protection is activated which forces the outputs to the high-impedance state. Periodically, the device attempts to restart. If the over-current condition is still present then the OCP remains active. The restart time, TOC, is determined by the R-C components connected to pin STBY.
Thermal protection (OTP)
If the junction temperature, Tj, reaches 145 C (nominally), the device goes to mute mode and the positive and negative PWM outputs are forced to 50% duty cycle. At Tj = 155 C (nominally), the device shuts down and the output is forced to the high impedance state. When the device cools sufficiently the device restarts.
7.8
Diagnostic output
The output pin DIAG is an open drain transistor. When the protection is activated it is in the high-impedance state. The pin can be connected to a power supply (< 20 V) by a pull-up resistor whose value is limited by the maximum sinking current (200 A) of the pin. Figure 30. Behavior of pin DIAG for various protection conditions
TDA7491HV
23/26
Application information
TDA7491HV
7.9
Heatsink requirements
A thermal resistance of 24 C/W can be obtained using the PCB copper ground layer with 16 vias connecting it to the contact area for the slug. Ensure that the copper ground area is a nominal 9 cm2 for 24 C/W. Figure 31 shows the derating curves for copper areas of 4 cm2 and 9 cm2. As with most amplifiers, the power dissipated within the device depends primarily on the supply voltage, the load impedance and the output modulation level. The maximum estimated power dissipation for the TDA7491HV is less than 4 W. When properly mounted on the above PCB the junction temperature could increase by 96 C. However, with a musical program the dissipated power is about 40% less, leading to a temperature increase of around 60 C. Even at the maximum recommended ambient temperature for consumer applications of 50 C there is still a clear safety margin before the maximum junction temperature (150 C) is reached. Figure 31. Power derating curves for PCB usedg heatsink as
Pd (W)
8 7 6 5 4 3 2 1 0 0 20 40 60 80
Tamb ( C)
Copper Area 2x2 cm and via holes Copper Area 3x3 cm and via holes
TDA7491HV TDA7491P PSSO-36 PSSO36
100
120
140
160
24/26
TDA7491HV
Revision history
8
Revision history
Table 9.
Date 11-Dec-2007
Document revision history
Revision 1 Initial release. Changes
25/26
TDA7491HV
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
26/26

▲Up To Search▲

Price & Availability of TDA7491HV

	To Download TDA7491HV Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .